TopJTAG Probe JTAG solution for design debug, diagnostics and repair.
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TopJTAG Probe Description

A boundary-scan (JTAG) based simple logic analyzer and circuit debugging software. Provides 1) the ability to monitor pin values in real-time without interference with the normal operation of a working device and 2) to interactively set up pin values for testing of board-level interconnects or on-chip internal logic. Main features: -Supports any JTAG-compliant devices (most modern CPUs, microcontrollers, FPGAs and CPLDs). -Graphical visualization of packages with color-coded pin values updated in real-time. -Waveform recording. -No netlists required, only BSDL files need to be provided. -CPLD and FPGA pin names and buses can be imported from Xilinx ISE .ucf and Altera Quartus II .qsf files. -An easy-to-use and affordable solution for manual interactive boundary-scan. No special knowledge is required to use boundary-scan technology (also known as JTAG or IEEE 1149.1 standard) as TopJTAG Probe provides a simple and intuitive user interface. TopJTAG Probe is an effortless, affordable and powerful JTAG solution for design debug, diagnostics and repair.

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