Verilog::Netlist::Pin

Pin on a Verilog Cell
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Verilog::Netlist::Pin Ranking & Summary

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  • Rating:
  • License:
  • Perl Artistic License
  • Price:
  • FREE
  • Publisher Name:
  • Wilson Snyder
  • Publisher web site:
  • http://search.cpan.org/~wsnyder/Verilog-Perl-3.035/Parser/Parser.pm

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Verilog::Netlist::Pin Description

Pin on a Verilog Cell Verilog::Netlist::Pin is a pin on a Verilog Cell.SYNOPSIS use Verilog::Netlist; ... my $pin = $cell->find_pin ('pinname'); print $pin->name;A Verilog::Netlist::Pin object is created by Verilog::Netlist::Cell for for each pin connection on a cell. A Pin connects a net in the current design to a port on the instantiated cell's module. Requirements: · Perl


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